解决方案
Workaround

If your design fails during stage 2 calibration, turn the OCB Monitor off and re-implement the design. This workaround has proven to work for most cases. This is a temporary workaround and should only be used until MIG v3.4 is available with ISE design tools 12.1.

Step 1

Open the top-level MIG rtl module. This will be either 'example_design/rtl/ip_top/example_top.v/.vhd' or 'user_design/rtl/ip_top/core_name.v/.vhd'

Step 2

Locate the OCB_MONITOR parameter and modify the setting from "ON" to "OFF":

Original setting:

parameter OCB_MONITOR = "ON",

Modify to:

parameter OCB_MONITOR = "OFF",

Step 3

Re-implement the design and run the output bit-file in hardware. If calibration failures still exist, please open a webcase for further support.